1. Field of the Invention
The present invention relates to an automatic phase control circuit and, more particularly, to an automatic phase control circuit for the playback section color signal frequency converter of a PAL system video tape recorders.
2. Description of the Prior Art
In video tape recorders (hereafter referred as VTR), when color signals are recorded and played back, frequency conversion of the color signal is designed to take place. For example, in the PAL system VTRs, the color signal is converted from its carrier frequency of 4.43 MHz to 626 KHz in the recording operation and restored from 626 KHz to the original 4.43 MHz in the reproducing operation. The circuit used for such frequency conversion includes an automatic phase control circuit (hereafter referred as APC circuit) for suppressing undesired phase variation of the playback color signal.
FIG. 7 shows an example of conventional frequency converters used in playback sections of the PAL system VTRs. In FIG. 7, the 626 KHz playback color signal C is mixed with the 5.056 MHz carrier signal CW by the frequency mixer 11 and converted to the 4.43 MHz color signal C. In this case, the frequency conversion output FC is phase-synchronized with a reference signal R provided from a crystal oscillator (referred as XO hereafter) 12 by a phase locked loop (refered as PLL hereafter) 10. That is to say, the phase comparator 13 in the PLL 10 compares the phases of the color burst signal CB, which is induced from the frequency conversion output FC, with the reference signal R. The result of the comparison, i.e., an error signal E between the color burst signal CB and the reference signal R is smoothed by a filter 14 and passed to a voltage controlled oscillator (referred as VCO hereafter) 15. By this means, the oscillation frequency of the VCO 15 is changed according to the filter output E of the phase comparator 13. By this frequency control, the frequency of a carrier signal CW, which is outputted from a phase shifter 16, is changed. As a result, the frequency conversion output FC is controlled so that the frequency and the phase of the color burst signal CB are synchronized with the frequency and the phase of the reference signal R.
First, suppose there is a stationary phase difference between the color burst signal CB in the playback color signal C and the reference signal R. Here, since the phase of the playback PAL system color signal C changes alternately to +45.degree. and -45.degree. in every horizontal cycle, the phase of the reference signal R could be explained as the mean of the above two phases.
Normally, the color burst signal CB in the playback color signal C is locked to a phase which is shifted 90.degree. from the reference signal R. In order to monitor this locked state, the reference signal R is delayed by 90.degree. from its original phase by a phase shifter 17. This delayed signal and the color burst signal CB are inputted to an irregular detection circuit (referred as ID circuit hereafter) 18. A detection output corresponding to the phase difference .theta. between those two signals is obtained as the output of a filter in the ID circuit 18. The detection output of the ID circuit 18 is set so that it is always a positive pulse for the stationary condition of the phase difference .theta.=+45.degree..
If the locked condition of the PLL 10 is disturbed and, in particular, if the mean value of the phase difference .theta. is shifted to the vicinity of 180.degree., it will take time for the PLL 10 to restore the locked condition. Therefore, this shift is monitored by the ID circuit 18 and the response speed of the PLL 10 is accelerated by advancing the phase of the output of the phase shifter 16 by 90.degree.. This kind of processing is generally called "burst ID processing".
However, since the PAL system color burst signal CB has a phase of +45.degree. and -45.degree. in every horizontal cycle as described above, in order to apply an automatic phase control (referred as APC hereafter) to the playback color signal C, it is necessary to increase the filtering characteristics of the filter 14 in the PLL 10. As a result, the response speed of the PLL 10 is decreased.
This kind of problem can be solved if a pair of reference signals R1 and R2 are used in place of single reference signal R, with their phases 90.degree. apart from each other. These signals R1 and R2 are outputted alternately at every horizontal cycle. That is to say, the APC of phase O can be applied in the same way as in the NTSC system VTRs by this method.
However, this arrangement creates a problem of reliability, because if the phase alternation timing of the pair of reference signals R1(+45.degree.) and R2(-45.degree.) and the alternation timing of the phases (+45.degree. and -45.degree.) of the color burst signal CB are shifted by one horizontal cycle from each other, the PLL 10 will not stabilize the phases.